In our review of AMD's new A10 'Trinity' APU, we wrote that the Llano chip with a 228 mm2 surface contains 1.18 billion transistors and that the Trinity has about 1.3 billion transistors on a 246 mm2 surface. This calculation wasn't completely flawless as AMD earlier reported a higher number of transistors.
Now, almost six months after changing the numbers, AMD has finally clarified its rectification. The explanation is that the manufacturer decided to overhaul its counting methods in 2012. The biggest difference is that AMD used to count the transistors and added the amount of decoupling capacitors to that number. The development of multiple field-effect transistors (MuGFET) provides a transistor with multiple gates, controlled by a single electrode. AMD and companies like IBM and Motorola use the term FinFET, while Intel uses a similar technique for its tri-gate transistors.
For this reason, AMD will henceforth only count the number of FinFET transistors, omitting the decoupling capacitors from their calculations. AMD initially claimed that the Llano APU featured 1.45 billion transistors, but recounting with the new method leads to 1.18 billion, a difference explained by the 280 million decoupling capacitors. Similarly, the Trinity APU has around 400 million decoupling capacitors and 1.3 billion transistors.
